1. Field of the Invention
The present invention relates to a flat panel display, and in particular, to a flat display panel having an electronic static discharge (ESD) protection circuit.
2. Description of Related Art
ESD is a common phenomenon in our daily life. Basically, because the electron affinity of each object is different, when any two objects contact and separate, electric charges are easily transferred between the two objects. Therefore, static electricity is accumulated. When the accumulation of the static electricity of the object exceeds a certain amount, and the object with static electricity contacts or approaches another object having different electric potential, the electric charges are transferred, which is called ESD.
More specifically, electronic products are likely to be damaged by the ESD during the manufacture, production, assembly, transportation, and even the improper use by a consumer. Therefore, the electronic products have to be equipped with an ESD protection design, so that the life span of the electronic products can be prolonged. Especially, the ESD protection design should be integrated in the products manufactured by using an advanced semiconductor manufacturing process, such as an integrated circuit (IC), a flat display panel, and etc. The reason is that the sizes of the components thereof are small, and therefore inner circuits of the IC or the flat panel display are easily damaged permanently by the ESD with a high voltage, which causes malfunction of the components.
In the flat panel displays nowadays, the effect of the ESD may cause a dot defect or a line defect of the flat panel displays. The occurrence of the ESD can not be avoided completely during the process of manufacturing the flat panel display, and therefore, conventional techniques often adopt an ESD protection circuit in the flat panel display to prevent the damage caused by the ESD. In the flat panel displays nowadays, the common ESD protection circuit is an inner short ring (ISR).
FIG. 1 is a schematic view of a conventional ESD protection circuit. Please refer to FIG. 1. The flat display panel 10 includes a substrate 70, a plurality of pixel units (as shown by pixel units 60), driving lines 40 and 42, an ESD protection device 20, and an ESD protection circuit 30. The driving lines 40 and 42 are coupled to a driving circuit 80. The driving lines 40 and 42 are, for example, data driving lines or scan driving lines, and are used for providing a driving signal to the pixel units 60 of the flat display panel 10. The driving circuit 80 is, for example, a data driving circuit or a scan driving circuit, and is used for providing the driving signal. The pixel units 60 are disposed in a display region 72 of the substrate 70 for displaying an image frame. It should be noted that only one driving line coupled to each of the pixel units 60 is shown in FIG. 1, but in fact, there should be two driving lines coupled to the pixel units 60, i.e., the data driving line and the scan driving line respectively.
Following the preceding paragraph, the ESD protection device 20 and the ESD protection circuit 30 are disposed in a non-display region 71 of the substrate 70. When the driving line 40 receives a voltage larger than a threshold voltage Vth, the ESD protection device 20 is conducted to discharge the static electricity away through the static protection circuit 30, wherein the ESD protection circuit 30 may also be called as a short ring. When the driving line 40 generates the static electricity with the high voltage, the pixel units 60 coupled to the driving line 40 may be damaged permanently. Accordingly, the ESD protection device 20 conducts the static electricity with the high voltage to the ESD protection circuit 30. Thereby, the pixel units 60 are prevented from being damaged by the static electricity.
However, the above-mentioned method has a critical disadvantage that a crossing place 50 of the driving line 40 and the ESD protection circuit 30 may easily be damaged by the static electricity, which causes an electrical connection between the driving line 40 and the ESD protection circuit 30. Once the driving line 40 and the ESD protection circuit 30 are electrically connected, the current leakage of the flat display panel 10 occurs. In such circumstance, the pixel units 60 coupled to the driving line 40 can not display normal color scale levels and brightness.
FIG. 2 is a schematic view illustrating occurrence of current leakage of a conventional ESD protection circuit. Please refer to FIG. 2, it is assumed that the driving circuit 80 provides the driving signal (current I1) through the driving line 40 in order to drive the pixel units 60. However, the driving line 40 and the ESD protection circuit 30 are electrically connected because the crossing place 50 is damaged by the static electricity. Therefore, the current I1 has partial current ΔI1 leaked to the ESD protection circuit 30, and only current I1-ΔI1 remains in the driving line 40 for being provided to the pixel units 60. From the aspect of the voltage, it is assumed that the driving signal (voltage V1) is provided through the driving line 40 to drive the pixel units 60. However, the driving line 40 and the ESD protection circuit 30 are electrically connected because the crossing place 50 is damaged by the static electricity. Therefore, the voltage V1 is lowered due to the influence of the ESD protection circuit 30. Certainly, the pixel units 60 can not display the normal color scale levels and the brightness. Further, the leaking current ΔI1 is usually large, and therefore, causes a line defect of the flat display panel 10. Thereby, the value of the flat display panel is greatly affected.
Therefore, LCD manufacturers have been looking for suitable solutions to overcome the aforementioned problems.